Particular embodiments generally relate to asymmetric correction circuits.
Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
In a read channel for a hard disk drive, a signal received from a read head of the disk drive may be asymmetric. For better performance, the symmetry of the asymmetric signal should be corrected.
FIG. 1a depicts a graph 100 of an asymmetric signal 102 and ideal signal 104. Ideal signal 104 includes pulses in a period that have absolute peak amplitudes that are equal and asymmetric signal 102 has pulses that have unequal absolute peak amplitudes in the period. The correction of asymmetric signal 102 is performed to correct the asymmetry of asymmetric signal to be similar to the symmetry of ideal signal 104.
One way of correcting asymmetric signal 102 is to generate a square term that increases or decreases the amplitude of asymmetric signal 102. FIG. 1b depicts a graph showing the correction. A square term 106 is combined with asymmetric signal 102 to produce an output signal 108. However, an additional path and circuitry is needed to generate the square term.
Another way of correcting asymmetric signal 102 is to use extra current sources. FIG. 2 depicts an example of a circuit for correcting asymmetric signal 102 using signal currents IS1, IS2, and IS3. The output of circuit 200 is across resistors 208a and 208b. Resistors 208a and 208b are connected between signal currents IS1 and IS2, and voltage is supplied by a common mode voltage source, Vcom. The current is varied to correct asymmetric signal 102. For example, adding more current through resistors 208a and 208b increases the output voltage (e.g., the amplitude of asymmetric signal 102) while decreasing the current through resistors 208a and 208b decreases the output voltage.
The switching section includes two pair of high speed field effect transistors 210 (including transistors T1, T2) and 212 (including transistors T3, T4) for switching biasing current to the amplifier section 214. Each of the transistors T1, T2, T3, T4 can behave as a switch. These characteristics of the transistors T1, T2, T3, T4 cause biasing current to flow through only the transistors having a positive gate, and not through the transistors having a negative gate. Therefore, whichever transistors are conducting are passing all the current. The current is not shared by each of the transistors of the switching pair.
The amplifier section 214 is a differential amplifier comprising a pair of field effect transistors T5 and T6. The differential amplifier is responsive to the differential input signal, Vip and Vin, producing a differential current, δi, proportional to the transconductance (or gain gm) of the transistor pair 214 times the differential signal input voltage Vip−Vin. Therefore, a positive differential current δi flows through transistor T5 and correspondingly, a negative differential current, −δi flows through transistor T6 when Vip is positive and Vin is negative. Conversely, when Vip is negative and Vip is positive, −δi flows in transistor T5 and δi flows in transistor T6. Also, when Vin is positive, transistors T1 and T4 are conducting causing a current of 2×δi to flow across the biasing resistors 208a and 208b. When Vin is positive, transistors T2 and T3 are conducting, also causing a current of 2×δi, to flow across resistors 208a and 208b. Adding more current through resistors 208a and 208b increases the output voltage (e.g., the amplitude of asymmetric signal 102).
Although using current summing may correct the asymmetry of asymmetric signal 102, the use of current summing needs higher supply voltage due to stacking switches on top of the signal current path, and may cause higher power usage, higher current, and use more area on an integrated circuit (IC) chip.